TRANCHE DE SILICIUM ET SON PROCEDE DE FABRICATION

N° de brevet: EP1052313 (A1)
Date de publication: 2000-11-15
Inventeur(s): KOBAYASHI NORIHIRO [JP];AKIYAMA SHOJI [JP];ABE TAKAO [JP];
Demandeur(s): SHINETSU HANDOTAI KK [JP];
Classification: C30B29/06;C30B33/00;C30B33/02;H01L21/302;H01L21/306;H01L21/322;
N° de demande: EP19990973311 19991201 
Numéro(s) de priorité: WO1999JP06732 19991201;JP19980346173 19981204 
Résumé dans la langue de publication The present invention provides a method for producing a silicon wafer characterized in that at least one surface of the wafer is subjected to a multi-step polishing process, in which a heat treatment in a mixed gas atmosphere of hydrogen and argon through use of a rapid heating/rapid cooling apparatus is substituted for a final polishing in the multi-step polishing process, and a silicon wafer produced by the method. Thereby, there can be provided a silicon wafer in high productivity wherein there is neither mechanical damages nor scratches on the surface of the wafer, surface roughness is significantly improved, and there is no slip dislocation.

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